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FIT3159 Computer architecture

Chief Examiner

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Unit Code, Name, Abbreviation

FIT3159 Computer architecture (03 Sep 2015, 3:20pm) [Comp Arch (03 Sep 2015, 3:20pm)]

Reasons for Introduction

Reasons for Introduction (03 Sep 2015, 3:21pm)

FIT3159 is a core unit for the new 2016 degree programs Bachelor of Software Engineering (Honours), and for the Bachelor of Information Technology, Computer and Network Security major.

Reasons for Change (21 Sep 2020, 11:51am)

21/09/2020 Admin: Update to include new assessment and teaching approach fields as per Handbook requirements.

24/9/19: Admin - updating the exam duration to include additional 10 minutes as per University requirement.

29/06/2017 Change to 2 hr exam duration to comply with new policy.

Introduced for course architecture programs. Effective semester 1, 2016

Role, Relationship and Relevance of Unit (03 Sep 2015, 3:26pm)

Key objectives of FIT3159 are to prepare students so that they will:

  • Understand the most important digital logic circuits employed in the design of a computer,
  • Understand basic internal architecture and operation of a microprogrammed and hardwired computer,
  • Understand interrupts and how to interface to peripherals,
  • Understand storage architectures and virtual memory techniques,
  • Understand performance accelerating architectural features such as caching, pipelining and superscalar techniques,
  • Understand differences between commonly used machine architectures.
  • All BSE (Hon) graduates require a solid and more detailed technical knowledge of computer architectures than that required by a more generalist IT degree. BInfoTech graduates majoring in Computer Networks and Security also require this unit.

    Objectives

    Objectives (14 Sep 2015, 11:15am)

    At the completion of this unit students should be able to:

    1. analyse simple logic circuits;
    2. explain and analyse key processor components;
    3. explain and analyse computer organisation;
    4. write and debug simple assembly language programs;
    5. use simulator programs to model computer system components.

    Unit Content

    ASCED Discipline Group Classification (03 Sep 2015, 3:27pm)

    031305

    Synopsis (03 Sep 2015, 3:27pm)

    This unit covers the internal mechanism of computers and how they are organised and programmed. Topics include combinatorial and sequential logic, Boolean Algebra, counters, ripple adders, tree adders, memory/addressing, busses, speed, DMA, data representation, machine arithmetic, microprogramming, caches and cache architectures, virtual memory and translation look-aside buffers, vectored interrupts, polled interrupts, pipelined architecture, superscalar architecture, data dependency, hazards, CISC, RISC, VLIW machine architectures.

    Prescribed Reading (for new units) (03 Sep 2015, 3:28pm)

    Recommended Texts (Not Prescribed)

    William Stallings, Computer Organization and Architecture: Designing for Performance, 8/E, Prentice Hall, ISBN-13: 9780136073734

    Morris Mano and Charles Kime , Logic and Computer Design Fundamentals 4/E, Pearson Prentice Hall, ISBN 0-13-140539-X

    Teaching Methods

    Mode (03 Sep 2015, 3:28pm)

    On-campus

    Special teaching arrangements (21 Sep 2020, 11:58am)

    Lecture and/or tutorials or problem classes (alternating fortnightly flipped tutorials and labs). The rationale for this teaching approach is to to employ the tutorials and laboratories to reinforce lecture content, in laboratories specifically by providing students with tasks that require application of the theoretical content in lectures, typically to solve a problem. This is a well proven approach in teaching this material and presents a low risk of poor learning outcomes.

    Assessment

    Assessment Summary (21 Sep 2020, 12:07pm)

    Examination (2 hours and 10 minutes): 60%; In-semester assessment: 40%.

    1. Laboratory Exercises: - 30% (5% each) - ULO: 1, 3, 4, 5
    2. Tutorial Exercises: - 10% (1.667% each) - ULO: 1, 2, 3
    3. Examination: - 60% - ULO: 1, 2, 3

    Workloads

    Workload Requirements (14 Sep 2015, 11:16am)

    Minimum total expected workload equals 12 hours per week comprising: (a.) Contact hours for on-campus students:

  • Two hours of lectures
  • One 3-hour laboratory or one 2-hour tutorial (alternating weeks)
  • (b.) Additional requirements (all students): }

  • A minimum of 7-8 hours independent study per week for preparing for and completing lab and project work, private study and revision.
  • Additional/Special Timetabling Requirements (03 Sep 2015, 3:30pm)

    6 tutorials plus 6 laboratories. Alternating fortnightly with tutorials starting in week 1.

    Resource Requirements

    Teaching Responsibility (Callista Entry) (03 Sep 2015, 3:30pm)

    List any non-standard software that may be required

    Prerequisites

    Prerequisite Units (14 Sep 2015, 11:16am)

    One of FIT1031, FIT1047, FIT1008 or FIT2085

    Prohibitions (14 Sep 2015, 11:17am)

    FIT2069

    Proposed year of Introduction (for new units) (03 Sep 2015, 3:32pm)

    Semester 1, 2017

    Location of Offering (03 Sep 2015, 3:32pm)

    Clayton, Sunway

    Faculty Information

    Proposer

    Ange Delbianco

    Approvals

    School: 14 Aug 2017 (Jeanette Niehus)
    Faculty Education Committee: 14 Aug 2017 (Jeanette Niehus)
    Faculty Board: 14 Aug 2017 (Jeanette Niehus)
    ADT:
    Faculty Manager:
    Dean's Advisory Council:
    Other:

    Version History

    03 Sep 2015 Ange Delbianco Introduced for course architecture programs. Effective semester 1, 2016
    14 Sep 2015 Caitlin Slattery Minor edits only.
    22 Sep 2015 Jeanette Niehus FIT3159 Chief Examiner Approval, ( proxy school approval )
    22 Sep 2015 Jeanette Niehus FEC Approval
    22 Sep 2015 Jeanette Niehus FacultyBoard Approval - UGPC special meeting 1/15 - 14/07/2015
    29 Jun 2017 Carlo Kopp modified ReasonsForIntroduction/RChange; modified Assessment/Summary
    14 Aug 2017 Jeanette Niehus FIT3159 Chief Examiner Approval, ( proxy school approval )
    14 Aug 2017 Jeanette Niehus FEC Approval
    14 Aug 2017 Jeanette Niehus FacultyBoard Approval - Approved at UGPC 4/17 (Item 6.1) 10/08/2017
    24 Sep 2019 Emma Nash modified ReasonsForIntroduction/RChange; modified Assessment/Summary
    21 Sep 2020 Miriam Little modified ReasonsForIntroduction/RChange; modified Teaching/SpecialArrangements; modified Assessment/Summary

    This version: