This unit is an introductory unit in digital logic circuits. It is an elective unit, taken principally by students in the BCS and BSE degrees.

This new monatar entry has been created to create a proposal for this unit under the new Faculty coding of FIT1017. The unit has been previously delivered under school codes of CSE1308 and CSE2306.

FIT1017 Digital Logic provides students in the BCS degree with an avenue to learn in some detail the behaviour and role of the basic components from which computational machinery is built. BSE students may also take it as part of an elective sequence in Digital Systems (details of this sequence, to be offered jointly with the Faculty of Engineering, are still yet to be determined).

There is a small overlap in a few topic areas of the new core unit FIT1001. However the depth and width of coverage of those topics is much more extensive in FIT1017. It provides students with an interest in hardware the opportunity to develop design and analysis skills in the areas of combinational and sequential digital logic circuits. The final topic set in the unit permits them to appreciate the bit level mechanisms that allow logic circuits to execute programs.

The BCS aims to produce graduates who understand the underpinnings of computing: software, hardware and theory. This unit directly addresses the middle objective.

At the completion of this unit, students are expected to

K1. Have working knowledge of number systems used to represent information in digital systems and related arithmetic operations

K2. Know the laws of two-valued Boolean Algebra and be able to transform logic expressions into various standard forms. Know the correspondence between a logic expression and its equivalent logic circuit (or vice versa).

K3. Understand various combinational logic minimisation methods and the detailed procedures required to carry them out.

K4. Understand the structure and behaviour of basic building blocks of digital systems, namely, gates, latches and flip-flops

K5. Understand the operation and application of the important combinational logic building blocks: decoders, multiplexers, incrementers, adders, division-by-constant circuits and Arithmetic-Logic units.

K6. Understand design methods of unstructured and structured combinational circuits

K7. Understand the concept of state in sequential circuits and be familiar with the Moore and Mealy circuit models.

K8. Understand the structure, behaviour and the design methods of asynchronous and synchronous sequential circuits. Be able to use state diagrams, state tables or state equations.

K9. Know how to design basic sequential blocks: counters, registers, and state machines.

K10. Understand the structure, behaviour and the design methods of simple processors consisting of a datapath and control unit

K11. Understand the use of ROMs and other programmable logic devices in implementation of digital circuits.

K12. Have knowledge of a hardware description language and its application in the design of combinational and sequential circuits.

K13. Have knowledge of commercial computer-aid-design tools

At the completion of this unit, students are expected to

A1. Have formed a view that digital logic hardware can execute algorithms once these are expressed in the appropriate hardware description language.

During this unit, students are expected to develop

P1. Skills in organising complex CAD workspaces with a sensible layout that indicates forward planning.

P2. Have developed sound habits in the observation and recording of results during their practical classes.

P3. Have developed good commenting practises in both their design workings or circuit analysis paperwork.

During this unit, students are expected to

R1. Communicate technical ideas and information to others in a written format.

R2. Explain to a lab tutor how a logic circuit was designed, implemented and verified.

R3. Participate in tutorial discussions on the various topics covered in the unit.

ASCED Discipline Group Classification: 031305 Computer Engineering

The unit is an introductory course in digital logic design and includes the necessary background on binary and other numbering systems plus various number representation formats useful in digital design and general computing.

Students learn methods of designing unstructured and structured combinational circuits. The methods include truth table, canonical and standard form representation, Boolean algebra and minimization techniques such as Karnaugh maps. In structured arithmetic circuits thay learn how to convert an arithmentic relationship into a structured combinational circuit such as incrementer, adder, division-by-constant circuit and Arithmetic-Logic units.

They learn how signal feedback creates building blocks of sequential circuits such as latches and flip-flops which exhibit memory effects. The design methods for sequential circuits include the state equation, state table, and state diagram representations. Subsequently they learn how to build sequentail blocks like registers, counters and state machines.

Next they learn how to assemble together combinational and sequential blocks to create simple processors consisting of datapath and control unit, that can implement simple sequential algorithms.

Throughout the course they learn how to describe the digital circuitry using a hardware description languaue.

The unit has a significant laboratory component including design and implementation exercises using commercial CAD tools.

An introduction to understanding and designing digital circuits. Topics: Binary Number Systems. Boolean Algebra and Logic Gates. Decoders and multiplexers. Unstructured combinational logic. Gate-Level Minimization. Hardware description language. Structured Combinational Logic. N-bit adders. Number system converters. Arithmetic-Logic units. Sequential circutis and their representations. Asynchronous sequential circuits. Latches and Flip-Flops. Synchronous sequential circuits. Registers and Counters. State machines. Simple processors: datapath and control unit. Word-serial multiplication processor. Students will use comercial CAD tools for digital and simulation of digital circuits.

"Digital Design" by Morris M Mano, third edition 2002 (Prentice-Hall).

On-campus

Lectures: 2 x 1hr per week

Tutorials: 1 x 1hr per week

Practicals: 1 x 3hr per week

Lectures: K(1, 3 - 15), A2,A3,P3

Tutorials: K(2 - 9), A2, R3

Practicals: K(1, 3 - 15), A1,A2,A3, P1,P2,P3, R1,R2

Assignments: K(1 - 5, 7 - 11), A2, P2,P3, R1

Practical work demonstration and reports, assignments: 50%

Writen examination (3 hours): 50%

Examination and tests: K(1 - 15), A2,A3, R1

Practical work: K(1 - 15), A1,A2,A3, P1,P2,P3, R1,R2

Tutorial work: K(1 - 11), A2, R1,R3

Assignments: K(1 - 11), A2, P2,P3, R1

12 hrs per week on average over the semester: 2 hrs lectures, 3 hrs practical laboratory class, 1 hr tutorial, 6 hours self-directed study, work on assignments, prac preparation, etc.

Hi-Tech lecture theatre: 2 x 1hr/week.

Small Low-Tech lecture theatre with blackboards or whiteboards: 4 x 1hr/week.

A standard PC lab running either Microsoft Windows of Linux depending on the version of CAD tool loaded.

Approx 1.5 EAS including lab demonstrators.

The unit will use the FPGAdantage CAD tools from Mentor Graphics Corporation. The Claton School of IT has a licence for thie software.

Sufficient copies of the recommended reading text should be available.

100% Faculty of Information Technology

None

None

Approx 100Mb of space on an ITS Novell filesever that can be managed by the unit coordinator to serve unit materials and recieve electronic design files submitted by students.

There are no prerequisties for this unit.