Near the beginning (circa 1995), there exisited a 4pt introductory unit on "Digital Logic" offererd by the Department of Computer Science and coded as CSC2061. There also exsisted a superficially similar unit "Digital Technology I" offered by the Department of Digital Systems. It was a 6pt unit with significantly higher lab work hours an a curriculum that contained more material on "real world" aspects of logic design plus design assignments and tutorials. It was offered at first-year level since the BDigSys degree had more advanced digital design units in its 2nd and 3rd years. The unit code was DGS1111.

In 1998 with the looming amalgamation of the two departments, delivery of these two units was partially rationalised by using a common lecture and prac stream along the lines of the Digital Technology I syllabus. To reflect the points differential, CSC2061 retained a 2hr exam, had no prac work hurdle, had no assignments nor "unit tests", and had an optional tutorial attendance.

In 1999 when the Faculty moved to 6pt units throughout 2nd and 3rd years, CSC2061 was recoded as CSE2306 (6pt) with the workload and assessment being identical to that for DGS1111. This was intended to be a temporary measure, because at the same time the alias code of CSE1308, with the name "Digital Logic" was introduced. This allowed BCompSci students to study this unit during their first rather than second year. It was expected that these changes would see the demand for CSE2306 dwindle and allow cancellation of that unit code.

Demand did dwindle to less than ten students under the CSE2306 code. However enrolments began to rise thereafter, reaching forty or more in some years. Possible reasons for this are: CSE2306 offerred in Malaysia, CSE2306 was within the Faculty of Science rules for BSci students wishing to take an FIT elective, CSE2306 proved useful in building coursemaps for students entering the BCompSci with advanced standing or at the mid-year intake. The last two categories exploited CSE2306's anomolous status as a level 2 unit without a prerequisite.

At the completion of the subject, the students should understand the operation and behaviour of the various logic gates which are the building blocks of digital logic circuits and be familiar with various number systems and representations common in the digital design and computing areas. They should have competence in the design and minimisation methods of combinational logic circuits of up to six input variables and be familiar with the combinational logic building blocks like decoders, multiplexers and the use of ROMs and other programmable logic devices (PLDs) to solve combinational logic problems. They should have a working knowledge of the laws of two-state Boolean Algebra, and be able to transform logic expressions into various standard forms. On the sequential logic front they should have knowledge of latches and flip-flops and be able to both design and analyse sequential circuits with a dozen or so states, inputs and outputs. They should be familiar with the state equation, the state table, and the state diagram representations of these circuits. They should be familiar with counters, registers, state machines and other manifestations of sequential logic circuits. On the practical side they should develop abilities in implementing circuits by wiring together commercially available integrated circuits. They will have an understanding of some real-world device behaviours not apparent in the simplified "blackboard world". They should have developed some skills in fault finding by constructing then testing a reasonable sequence of fault hypotheses.

An objective here is to develop the belief that complex logic circuits can usually be partitioned into a number of smaller and understandable blocks. The "divide and conquer" approach can be applied outside of circuit analysis.

The practical programme of the unit involves both the uses of CAD logic design and simulation tools and the building of real circuits on prototype wiring boards. The first builds skills in the fast entry of design information into a CAD system. The second hones motor skills necessary for the fine placement of connecting wires and the planning and layout skills necessary for constructing complex systems requiring >100 connections.

The best I hope for here is to practice communicating technical ideas and information to others in an accurate and unambiguous way.

The unit is an introductory course in digital logic design and includes the necessary background on binary and other numbering systems plus various number representation formats useful in digital design and general computing.

Students learn combinational logic design methods and minimisation techniques. This includes: truth tables, standard forms, Karnaugh maps, Boolean algebra, Decoders, muxes, adders, ROMs and PLDs. They learn how signal feedback creates latches and flip-flops which exhibit memory effects. Sequential logic design and analysis topics count for about half of the unit. These include: counter, register and state machine design and the state equation, state table, and state diagram representations.

The unit has a large laboratory component including design and implementation exercises using both CAD design and simulation tools, as well as prototype wiring boards with commercial integrated circuit components.

"Digital Design" by Morris M Mano, second edition 1991 (Prentice-Hall).

On-campus.

Lectures

Tutorials

Practicals

Assignments(2)

Unit tests(3)

Lectures: C1,C2,C3,C4

Tutorials: C1,C2,C3,C4,C5,A1,A2

Practicals: C1-C5,P1-P5

Assignments: C4,C5,C6,P7

Writen examination (3 hours): 55%

Examination and tests: C1 to C5

Practical work: P1 to P5

Tutorial work: C1 to C5, S1 to S3

Assignments: C1 to C6, P6 and P7

6

Approx 120 - 150 hours total commitment for the semester.

Lectures: 26 hrs, Practicals: 36hrs, Tutes & tests: 12hrs, Prac prep/write up: 15 hrs, Assignments: 10hrs, Self-directed study: 20-50hrs

Hi-Tech: 1 x 1hr/week, Low-Tech:(blackboards): 1 x 1hr/week

Small Low-Tech lecture theatre with blackboards: 4 x 1hr/week

Spacious computer lab needed, (eg Rm 138/63) with storage cupboards for extra equipment such as 5V power supplies and "DLT" interface boards. Computers to run Windows OS with network access. Machines need 25-pin printer port to allow the "Digital Logic Trainer" interface board to be connected.

Approx 1.5 EAS including lab demonstrators.

• Software Title:
• Vendor:
• Version:
• OS: MS Windows XP ( ) and/or LINUX ( )
• License Details: (A valid software license certificate/s or Vendor permission must be available upon request if the software is to be installed for teaching)
• Are we currently licensed: Yes ( ) or No ( ) (If unsure, please check with your local IT support )
• If (Yes), who is the contact person for this software?:
• If (No), will the software license be arranged by: Staff member requesting the software ( ) or Technical Services* ( ) ? *If the latter is selected, please discuss your requirement/s with myself ASAP, prior to finalising your request, as there could be financial or resourcing implications.
• Is the software to be installed and accessed from a: Client/Workstation ( ), or Server ( ) ?
• Type of license: Site License ( ), Freeware ( ), FOSS (Free and Open Source Software) ( ), Shareware ( ), Lab based ( ) # of Licenses needed ____
• In what week will you commence using the software in class? Semester 1 (Week ___ ) and/or Semester 2 (Week ___ ):
• Nominated Staff For Acceptance Testing Software: (Name) (Phone) (Email)
• Additional Information: Special Requirements, Software Configuration/Installation Requirements, etc:

Digital Logic Training package "DLT.exe" (authored by P. Atkinson) served to Windows lab machines from Novell fileserver. Note under windows XP the I/O permissions bit map needs to be modified to allow user level 3 code direct access to the ports controlling the parallel printer port. Administrator level access to the lab machines is needed for this modification.

100% Computer Science and Software Engineering (or successor)

None.

None.

Approx 100Mb of space on an ITS filesever that can be managed by the unit coordinator to serve unit materials and recieve electronic design files submitted by students.

There are no prerequisties for this unit.